Bridge++  Ver.2.1.3
shiftAField_lex-tmpl.h
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1 
9 template<typename AFIELD>
10 const std::string ShiftAField_lex<AFIELD>::class_name =
11  "ShiftAField_lex<AFIELD>";
12 //====================================================================
13 template<typename AFIELD>
14 void ShiftAField_lex<AFIELD>::init(int Nin)
15 {
16  int Ndim = CommonParameters::Ndim();
17  std::vector<int> bc(Ndim);
18  for(int mu = 0; mu < Ndim; ++mu) bc[mu] = 1;
19 
20  init(Nin, bc);
21 
22 }
23 
24 //====================================================================
25 template<typename AFIELD>
26 void ShiftAField_lex<AFIELD>::init(int Nin, std::vector<int>& bc)
27 {
28  m_vl = CommonParameters::Vlevel();
29 
30  //int req_comm = 1; // set 1 if communication forced any time
31  int req_comm = 0; // set 0 if communication only when necessary
32 
33  vout.general(m_vl, "%s: being constructed.\n", class_name.c_str());
34 
35  m_Nin = Nin;
36  vout.general(m_vl, " Nin = %d\n", m_Nin);
37 
38  m_Nx = CommonParameters::Nx();
39  m_Ny = CommonParameters::Ny();
40  m_Nz = CommonParameters::Nz();
41  m_Nt = CommonParameters::Nt();
42  m_Nvol = m_Nx * m_Ny * m_Nz * m_Nt;
43 
44  m_Ndim = CommonParameters::Ndim();
45 
46  m_Nsize[0] = m_Nx;
47  m_Nsize[1] = m_Ny;
48  m_Nsize[2] = m_Nz;
49  m_Nsize[3] = m_Nt;
50 
51  if(bc.size() != m_Ndim){
52  vout.crucial(m_vl, "%s: incorrect size of boundary condition\n",
53  class_name.c_str());
54  exit(EXIT_FAILURE);
55  }
56 
57  m_boundary.resize(m_Ndim);
58 
59  for(int mu = 0; mu < m_Ndim; ++mu){
60  m_boundary[mu] = bc[mu];
61  vout.general(m_vl, " boundary[%d] = %2d\n", mu, m_boundary[mu]);
62  }
63 
64  do_comm_any = 0;
65  for(int mu = 0; mu < m_Ndim; ++mu){
66  do_comm[mu] = 1;
67  if(req_comm == 0 && Communicator::npe(mu) == 1) do_comm[mu] = 0;
68  do_comm_any += do_comm[mu];
69  vout.general(m_vl, " do_comm[%d] = %d\n", mu, do_comm[mu]);
70  }
71 
72  for (int mu = 0; mu < m_Ndim; ++mu) {
73  m_bc[mu] = 1;
74  if(do_comm[mu] > 0){ // do communication
75  if(Communicator::ipe(mu) == 0) m_bc[mu] = m_boundary[mu];
76  m_bc2[mu] = 0;
77  }else{ // no communication
78  m_bc[mu] = 0; // for boundar part (dummy)
79  m_bc2[mu] = m_boundary[mu]; // for bulk part
80  }
81  }
82 
83  m_Nbdsize.resize(m_Ndim);
84  m_Nbdsize[0] = m_Nin * ceil_nwp(m_Ny * m_Nz * m_Nt);
85  m_Nbdsize[1] = m_Nin * ceil_nwp(m_Nx * m_Nz * m_Nt);
86  m_Nbdsize[2] = m_Nin * ceil_nwp(m_Nx * m_Ny * m_Nt);
87  m_Nbdsize[3] = m_Nin * ceil_nwp(m_Nx * m_Ny * m_Nz);
88 
89  setup_channels();
90 
91  vout.general(m_vl, "%s: construction finished.\n", class_name.c_str());
92 
93 }
94 
95 //====================================================================
96 template<typename AFIELD>
97 void ShiftAField_lex<AFIELD>::tidyup()
98 {
99  // device memory clean up
100  for(int mu = 0; mu < m_Ndim; ++mu){
101 
102 #ifdef USE_MPI
103  real_t* buf_dn1 = (real_t*)chsend_dn[mu].ptr();
104  real_t* buf_dn2 = (real_t*)chrecv_dn[mu].ptr();
105  real_t* buf_up1 = (real_t*)chrecv_up[mu].ptr();
106  real_t* buf_up2 = (real_t*)chsend_up[mu].ptr();
107  BridgeACC::afield_tidyup(buf_dn1, m_Nbdsize[mu]);
108  BridgeACC::afield_tidyup(buf_dn2, m_Nbdsize[mu]);
109  BridgeACC::afield_tidyup(buf_up1, m_Nbdsize[mu]);
110  BridgeACC::afield_tidyup(buf_up2, m_Nbdsize[mu]);
111 #else
112  real_t* buf_up = (real_t*)chsend_dn[mu].ptr();
113  real_t* buf_dn = (real_t*)chsend_up[mu].ptr();
114  BridgeACC::afield_tidyup(buf_up, m_Nbdsize[mu]);
115  BridgeACC::afield_tidyup(buf_dn, m_Nbdsize[mu]);
116 #endif
117  }
118 
119 }
120 
121 //====================================================================
122 template<typename AFIELD>
123 void ShiftAField_lex<AFIELD>::setup_channels()
124 {
125  chsend_up.resize(m_Ndim);
126  chrecv_up.resize(m_Ndim);
127  chsend_dn.resize(m_Ndim);
128  chrecv_dn.resize(m_Ndim);
129 
130  for(int mu = 0; mu < m_Ndim; ++mu){
131 
132  int Nvsize = m_Nbdsize[mu] * sizeof(real_t);
133 
134  chsend_dn[mu].send_init(Nvsize, mu, -1);
135  chsend_up[mu].send_init(Nvsize, mu, 1);
136 #ifdef USE_MPI
137  chrecv_up[mu].recv_init(Nvsize, mu, 1);
138  chrecv_dn[mu].recv_init(Nvsize, mu, -1);
139 #else
140  void* buf_up = (void*)chsend_dn[mu].ptr();
141  chrecv_up[mu].recv_init(Nvsize, mu, 1, buf_up);
142  void* buf_dn = (void*)chsend_up[mu].ptr();
143  chrecv_dn[mu].recv_init(Nvsize, mu, -1, buf_dn);
144 #endif
145  if(do_comm[mu] == 1){
146  chset_send.append(chsend_up[mu]);
147  chset_send.append(chsend_dn[mu]);
148  chset_recv.append(chrecv_up[mu]);
149  chset_recv.append(chrecv_dn[mu]);
150  }
151 
152  // openacc device memory allocation
153 #ifdef USE_MPI
154  real_t* buf_dn1 = (real_t*)chsend_dn[mu].ptr();
155  real_t* buf_dn2 = (real_t*)chrecv_dn[mu].ptr();
156  real_t* buf_up1 = (real_t*)chrecv_up[mu].ptr();
157  real_t* buf_up2 = (real_t*)chsend_up[mu].ptr();
158  BridgeACC::afield_init(buf_dn1, m_Nbdsize[mu]);
159  BridgeACC::afield_init(buf_dn2, m_Nbdsize[mu]);
160  BridgeACC::afield_init(buf_up1, m_Nbdsize[mu]);
161  BridgeACC::afield_init(buf_up2, m_Nbdsize[mu]);
162 #else
163  BridgeACC::afield_init((real_t*)buf_up, m_Nbdsize[mu]);
164  BridgeACC::afield_init((real_t*)buf_dn, m_Nbdsize[mu]);
165 #endif
166 
167  }
168 
169 }
170 
171 //====================================================================
172 template<typename AFIELD>
173 void ShiftAField_lex<AFIELD>::backward(AFIELD& v, const AFIELD& w,
174  const int mu)
175 {
176  int Nex = w.nex();
177  assert(w.check_size(m_Nin, m_Nvol, Nex));
178  assert(v.check_size(m_Nin, m_Nvol, Nex));
179 
180  AIndex_lex<real_t, AFIELD::IMPL> index;
181 
182  for(int ex = 0; ex < Nex; ++ex){
183 
184  real_t* vp = v.ptr(index.idx(0, m_Nin, 0, ex));
185  real_t* wp = const_cast<AFIELD*>(&w)->ptr(index.idx(0, m_Nin, 0, ex));
186 
187  if(mu == 0) {
188  up_x(vp, wp);
189  }else if(mu == 1) {
190  up_y(vp, wp);
191  }else if(mu == 2) {
192  up_z(vp, wp);
193  }else if(mu == 3) {
194  up_t(vp, wp);
195  }else{
196  vout.crucial(m_vl, "Error at %s: wrong parameter\n",
197  class_name.c_str());
198  exit(EXIT_FAILURE);
199  }
200 
201  }
202 
203 }
204 
205 //====================================================================
206 template<typename AFIELD>
207 void ShiftAField_lex<AFIELD>::backward(AFIELD& v, const int ex1,
208  const AFIELD& w, const int ex2,
209  const int mu)
210 {
211  int Nex = v.nex();
212  assert(v.check_size(m_Nin, m_Nvol, Nex));
213  assert(ex1 < Nex);
214  Nex = w.nex();
215  assert(w.check_size(m_Nin, m_Nvol, Nex));
216  assert(ex2 < Nex);
217 
218  AIndex_lex<real_t, AFIELD::IMPL> index;
219 
220  real_t* vp = v.ptr(index.idx(0, m_Nin, 0, ex1));
221  real_t* wp = const_cast<AFIELD*>(&w)->ptr(index.idx(0, m_Nin, 0, ex2));
222 
223  if(mu == 0) {
224  up_x(vp, wp);
225  }else if(mu == 1) {
226  up_y(vp, wp);
227  }else if(mu == 2) {
228  up_z(vp, wp);
229  }else if(mu == 3) {
230  up_t(vp, wp);
231  }else{
232  vout.crucial(m_vl, "Error at %s: wrong parameter\n",
233  class_name.c_str());
234  exit(EXIT_FAILURE);
235  }
236 
237 }
238 
239 //====================================================================
240 template<typename AFIELD>
241 void ShiftAField_lex<AFIELD>::forward(AFIELD& v, const AFIELD& w,
242  const int mu)
243 {
244  int Nex = w.nex();
245  assert(w.check_size(m_Nin, m_Nvol, Nex));
246  assert(v.check_size(m_Nin, m_Nvol, Nex));
247 
248  AIndex_lex<real_t, AFIELD::IMPL> index;
249 
250  for(int ex = 0; ex < Nex; ++ex){
251 
252  real_t* vp = v.ptr(index.idx(0, m_Nin, 0, ex));
253  real_t* wp = const_cast<AFIELD*>(&w)->ptr(index.idx(0, m_Nin, 0, ex));
254 
255  if (mu == 0) {
256  dn_x(vp, wp);
257  } else if (mu == 1) {
258  dn_y(vp, wp);
259  } else if (mu == 2) {
260  dn_z(vp, wp);
261  } else if (mu == 3) {
262  dn_t(vp, wp);
263  } else {
264  vout.crucial(m_vl, "Error at %s: wrong parameter\n",
265  class_name.c_str());
266  exit(EXIT_FAILURE);
267  }
268 
269  }
270 
271 }
272 
273 //====================================================================
274 template<typename AFIELD>
275 void ShiftAField_lex<AFIELD>::forward(AFIELD& v, const int ex1,
276  const AFIELD& w, const int ex2,
277  const int mu)
278 {
279  int Nex = v.nex();
280  assert(v.check_size(m_Nin, m_Nvol, Nex));
281  assert(ex1 < Nex);
282  Nex = w.nex();
283  assert(w.check_size(m_Nin, m_Nvol, Nex));
284  assert(ex2 < Nex);
285 
286  AIndex_lex<real_t, AFIELD::IMPL> index;
287 
288  real_t* vp = v.ptr(index.idx(0, m_Nin, 0, ex1));
289  real_t* wp = const_cast<AFIELD*>(&w)->ptr(index.idx(0, m_Nin, 0, ex2));
290 
291  if (mu == 0) {
292  dn_x(vp, wp);
293  } else if (mu == 1) {
294  dn_y(vp, wp);
295  } else if (mu == 2) {
296  dn_z(vp, wp);
297  } else if (mu == 3) {
298  dn_t(vp, wp);
299  } else {
300  vout.crucial(m_vl, "Error at %s: wrong parameter\n",
301  class_name.c_str());
302  exit(EXIT_FAILURE);
303  }
304 
305 }
306 
307 //====================================================================
308 template<typename AFIELD>
309 void ShiftAField_lex<AFIELD>::up_x(real_t *v2, real_t *v1)
310 {
311 #pragma omp barrier
312 
313  int ith = ThreadManager::get_thread_id();
314  if (ith == 0){
315 
316  int idir = 0;
317  real_t *buf1 = (real_t*)chsend_dn[idir].ptr();
318  real_t *buf2 = (real_t*)chrecv_up[idir].ptr();
319 
320  if(do_comm[idir] > 0){
321  BridgeACC::shift_lex_xp1(buf1, v1, m_Nin, m_Nsize, m_bc);
322  BridgeACC::copy_from_device(buf1, m_Nbdsize[idir]);
323  chrecv_up[idir].start();
324  chsend_dn[idir].start();
325  }
326 
327  BridgeACC::shift_lex_xpb(v2, v1, m_Nin, m_Nsize, m_bc2);
328 
329  if(do_comm[idir] > 0){
330  chsend_dn[idir].wait();
331  chrecv_up[idir].wait();
332  BridgeACC::copy_to_device(buf2, m_Nbdsize[idir]);
333  BridgeACC::shift_lex_xp2(v2, buf2, m_Nin, m_Nsize, m_bc);
334  }
335 
336  }
337 #pragma omp barrier
338 
339 }
340 
341 //====================================================================
342 template<typename AFIELD>
343 void ShiftAField_lex<AFIELD>::dn_x(real_t *v2, real_t *v1)
344 {
345 #pragma omp barrier
346 
347  int ith = ThreadManager::get_thread_id();
348  if (ith == 0){
349 
350  int idir = 0;
351  real_t *buf1 = (real_t*)chsend_up[idir].ptr();
352  real_t *buf2 = (real_t*)chrecv_dn[idir].ptr();
353 
354  if(do_comm[idir] > 0){
355  BridgeACC::shift_lex_xm1(buf1, v1, m_Nin, m_Nsize, m_bc);
356  BridgeACC::copy_from_device(buf1, m_Nbdsize[idir]);
357  chrecv_dn[idir].start();
358  chsend_up[idir].start();
359  }
360 
361  BridgeACC::shift_lex_xmb(v2, v1, m_Nin, m_Nsize, m_bc2);
362 
363  if(do_comm[idir] > 0){
364  chsend_up[idir].wait();
365  chrecv_dn[idir].wait();
366  BridgeACC::copy_to_device(buf2, m_Nbdsize[idir]);
367  BridgeACC::shift_lex_xm2(v2, buf2, m_Nin, m_Nsize, m_bc);
368  }
369 
370  }
371 #pragma omp barrier
372 
373 }
374 
375 //====================================================================
376 template<typename AFIELD>
377 void ShiftAField_lex<AFIELD>::up_y(real_t *v2, real_t *v1)
378 {
379 #pragma omp barrier
380 
381  int ith = ThreadManager::get_thread_id();
382  if (ith == 0){
383 
384  int idir = 1;
385  real_t *buf1 = (real_t*)chsend_dn[idir].ptr();
386  real_t *buf2 = (real_t*)chrecv_up[idir].ptr();
387 
388  if(do_comm[idir] > 0){
389  BridgeACC::shift_lex_yp1(buf1, v1, m_Nin, m_Nsize, m_bc);
390  BridgeACC::copy_from_device(buf1, m_Nbdsize[idir]);
391  chrecv_up[idir].start();
392  chsend_dn[idir].start();
393  }
394 
395  BridgeACC::shift_lex_ypb(v2, v1, m_Nin, m_Nsize, m_bc2);
396 
397  if(do_comm[idir] > 0){
398  chsend_dn[idir].wait();
399  chrecv_up[idir].wait();
400  BridgeACC::copy_to_device(buf2, m_Nbdsize[idir]);
401  BridgeACC::shift_lex_yp2(v2, buf2, m_Nin, m_Nsize, m_bc);
402  }
403 
404  }
405 #pragma omp barrier
406 
407 }
408 
409 //====================================================================
410 template<typename AFIELD>
411 void ShiftAField_lex<AFIELD>::dn_y(real_t *v2, real_t *v1)
412 {
413 #pragma omp barrier
414 
415  int ith = ThreadManager::get_thread_id();
416  if (ith == 0){
417 
418  int idir = 1;
419 
420  real_t *buf1 = (real_t*)chsend_up[idir].ptr();
421  real_t *buf2 = (real_t*)chrecv_dn[idir].ptr();
422 
423  if(do_comm[idir] > 0){
424  BridgeACC::shift_lex_ym1(buf1, v1, m_Nin, m_Nsize, m_bc);
425  BridgeACC::copy_from_device(buf1, m_Nbdsize[idir]);
426  chrecv_dn[idir].start();
427  chsend_up[idir].start();
428  }
429 
430  BridgeACC::shift_lex_ymb(v2, v1, m_Nin, m_Nsize, m_bc2);
431 
432  if(do_comm[idir] > 0){
433  chsend_up[idir].wait();
434  chrecv_dn[idir].wait();
435  BridgeACC::copy_to_device(buf2, m_Nbdsize[idir]);
436  BridgeACC::shift_lex_ym2(v2, buf2, m_Nin, m_Nsize, m_bc);
437  }
438 
439  }
440 #pragma omp barrier
441 
442 }
443 
444 //====================================================================
445 template<typename AFIELD>
446 void ShiftAField_lex<AFIELD>::up_z(real_t *v2, real_t *v1)
447 {
448 #pragma omp barrier
449 
450  int ith = ThreadManager::get_thread_id();
451  if (ith == 0){
452 
453  int idir = 2;
454  real_t *buf1 = (real_t*)chsend_dn[idir].ptr();
455  real_t *buf2 = (real_t*)chrecv_up[idir].ptr();
456 
457  if(do_comm[idir] > 0){
458  BridgeACC::shift_lex_zp1(buf1, v1, m_Nin, m_Nsize, m_bc);
459  BridgeACC::copy_from_device(buf1, m_Nbdsize[idir]);
460  chrecv_up[idir].start();
461  chsend_dn[idir].start();
462  }
463 
464  BridgeACC::shift_lex_zpb(v2, v1, m_Nin, m_Nsize, m_bc2);
465 
466  if(do_comm[idir] > 0){
467  chsend_dn[idir].wait();
468  chrecv_up[idir].wait();
469  BridgeACC::copy_to_device(buf2, m_Nbdsize[idir]);
470  BridgeACC::shift_lex_zp2(v2, buf2, m_Nin, m_Nsize, m_bc);
471  }
472 
473  }
474 #pragma omp barrier
475 
476 }
477 
478 //====================================================================
479 template<typename AFIELD>
480 void ShiftAField_lex<AFIELD>::dn_z(real_t *v2, real_t *v1)
481 {
482 #pragma omp barrier
483 
484  int ith = ThreadManager::get_thread_id();
485  if (ith == 0){
486 
487  int idir = 2;
488  real_t *buf1 = (real_t*)chsend_up[idir].ptr();
489  real_t *buf2 = (real_t*)chrecv_dn[idir].ptr();
490 
491  if(do_comm[idir] > 0){
492  BridgeACC::shift_lex_zm1(buf1, v1, m_Nin, m_Nsize, m_bc);
493  BridgeACC::copy_from_device(buf1, m_Nbdsize[idir]);
494  chrecv_dn[idir].start();
495  chsend_up[idir].start();
496  }
497 
498  BridgeACC::shift_lex_zmb(v2, v1, m_Nin, m_Nsize, m_bc2);
499 
500  if(do_comm[idir] > 0){
501  chsend_up[idir].wait();
502  chrecv_dn[idir].wait();
503  BridgeACC::copy_to_device(buf2, m_Nbdsize[idir]);
504  BridgeACC::shift_lex_zm2(v2, buf2, m_Nin, m_Nsize, m_bc);
505  }
506 
507  }
508 #pragma omp barrier
509 
510 }
511 
512 //====================================================================
513 template<typename AFIELD>
514 void ShiftAField_lex<AFIELD>::up_t(real_t *v2, real_t *v1)
515 {
516 #pragma omp barrier
517 
518  int ith = ThreadManager::get_thread_id();
519  if (ith == 0){
520 
521  int idir = 3;
522  real_t *buf1 = (real_t*)chsend_dn[idir].ptr();
523  real_t *buf2 = (real_t*)chrecv_up[idir].ptr();
524 
525  if(do_comm[idir] > 0){
526  BridgeACC::shift_lex_tp1(buf1, v1, m_Nin, m_Nsize, m_bc);
527  BridgeACC::copy_from_device(buf1, m_Nbdsize[idir]);
528  chrecv_up[idir].start();
529  chsend_dn[idir].start();
530  }
531 
532  BridgeACC::shift_lex_tpb(v2, v1, m_Nin, m_Nsize, m_bc2);
533 
534  if(do_comm[idir] > 0){
535  chsend_dn[idir].wait();
536  chrecv_up[idir].wait();
537  BridgeACC::copy_to_device(buf2, m_Nbdsize[idir]);
538  BridgeACC::shift_lex_tp2(v2, buf2, m_Nin, m_Nsize, m_bc);
539  }
540 
541  }
542 #pragma omp barrier
543 
544 }
545 
546 //====================================================================
547 template<typename AFIELD>
548 void ShiftAField_lex<AFIELD>::dn_t(real_t *v2, real_t *v1)
549 {
550 #pragma omp barrier
551 
552  int ith = ThreadManager::get_thread_id();
553  if (ith == 0){
554 
555  int idir = 3;
556  real_t *buf1 = (real_t*)chsend_up[idir].ptr();
557  real_t *buf2 = (real_t*)chrecv_dn[idir].ptr();
558 
559  if(do_comm[idir] > 0){
560  BridgeACC::shift_lex_tm1(buf1, v1, m_Nin, m_Nsize, m_bc);
561  BridgeACC::copy_from_device(buf1, m_Nbdsize[idir]);
562  chrecv_dn[idir].start();
563  chsend_up[idir].start();
564  }
565 
566  BridgeACC::shift_lex_tmb(v2, v1, m_Nin, m_Nsize, m_bc2);
567 
568  if(do_comm[idir] > 0){
569  chsend_up[idir].wait();
570  chrecv_dn[idir].wait();
571  BridgeACC::copy_to_device(buf2, m_Nbdsize[idir]);
572  BridgeACC::shift_lex_tm2(v2, buf2, m_Nin, m_Nsize, m_bc);
573  }
574 
575  }
576 #pragma omp barrier
577 
578 }
579 
580 //============================================================END=====
ShiftAField_lex::setup_channels
void setup_channels()
setup channels for communication.
Definition: shiftAField_lex-tmpl.h:123
CommonParameters::Ny
static int Ny()
Definition: commonParameters.h:106
CommonParameters::Nz
static int Nz()
Definition: commonParameters.h:107
ShiftAField_lex::tidyup
void tidyup()
Definition: shiftAField_lex-tmpl.h:97
BridgeACC::shift_lex_ypb
void shift_lex_ypb(real_t *restrict v2, real_t *restrict v1, int nin, int *Nsize, int *bc)
BridgeACC::shift_lex_xm1
void shift_lex_xm1(real_t *restrict buf, real_t *restrict v1, int nin, int *Nsize, int *bc)
ShiftAField_lex::backward
void backward(AFIELD &, const AFIELD &, const int mu)
Definition: shiftAField_lex-tmpl.h:173
CommonParameters::Ndim
static int Ndim()
Definition: commonParameters.h:117
BridgeACC::afield_tidyup
void afield_tidyup(double *data, const int size)
BridgeACC::shift_lex_tm1
void shift_lex_tm1(real_t *restrict buf, real_t *restrict v1, int nin, int *Nsize, int *bc)
AIndex_lex
Definition: aindex_lex_base.h:17
BridgeACC::shift_lex_zpb
void shift_lex_zpb(real_t *restrict v2, real_t *restrict v1, int nin, int *Nsize, int *bc)
ShiftAField_lex::dn_z
void dn_z(real_t *, real_t *)
Definition: shiftAField_lex-tmpl.h:480
ShiftAField_lex::up_y
void up_y(real_t *, real_t *)
Definition: shiftAField_lex-tmpl.h:377
BridgeACC::shift_lex_tpb
void shift_lex_tpb(real_t *restrict v2, real_t *restrict v1, int nin, int *Nsize, int *bc)
Field::nex
int nex() const
Definition: field.h:128
Field::check_size
bool check_size(const int nin, const int nvol, const int nex) const
checking size parameters. [23 May 2016 H.Matsufuru]
Definition: field.h:135
BridgeACC::shift_lex_yp2
void shift_lex_yp2(real_t *restrict v2, real_t *restrict buf, int nin, int *Nsize, int *bc)
ShiftAField_lex< Field >::real_t
Field ::real_t real_t
Definition: shiftAField_lex.h:31
BridgeACC::shift_lex_ymb
void shift_lex_ymb(real_t *restrict v2, real_t *restrict v1, int nin, int *Nsize, int *bc)
ShiftAField_lex
Shift of a field in the lexical site index.
Definition: shiftAField_lex.h:28
BridgeACC::shift_lex_xpb
void shift_lex_xpb(real_t *restrict v2, real_t *restrict v1, int nin, int *Nsize, int *bc)
BridgeACC::copy_from_device
void copy_from_device(double *v, int nv)
ShiftAField_lex::init
void init(int Nin)
Definition: shiftAField_lex-tmpl.h:14
BridgeACC::shift_lex_xm2
void shift_lex_xm2(real_t *restrict v2, real_t *restrict buf, int nin, int *Nsize, int *bc)
CommonParameters::Nx
static int Nx()
Definition: commonParameters.h:105
idir
idir
Definition: mult_Domainwall_eo_xyz_openacc-inc.h:264
BridgeACC::shift_lex_tp1
void shift_lex_tp1(real_t *restrict buf, real_t *restrict v1, int nin, int *Nsize, int *bc)
ShiftAField_lex::dn_t
void dn_t(real_t *, real_t *)
Definition: shiftAField_lex-tmpl.h:548
BridgeACC::shift_lex_tmb
void shift_lex_tmb(real_t *restrict v2, real_t *restrict v1, int nin, int *Nsize, int *bc)
CommonParameters::Nt
static int Nt()
Definition: commonParameters.h:108
Communicator::npe
static int npe(const int dir)
logical grid extent
Definition: communicator.cpp:112
ShiftAField_lex::dn_x
void dn_x(real_t *, real_t *)
Definition: shiftAField_lex-tmpl.h:343
ShiftAField_lex::up_t
void up_t(real_t *, real_t *)
Definition: shiftAField_lex-tmpl.h:514
BridgeACC::shift_lex_zp2
void shift_lex_zp2(real_t *restrict v2, real_t *restrict buf, int nin, int *Nsize, int *bc)
BridgeACC::shift_lex_yp1
void shift_lex_yp1(real_t *restrict buf, real_t *restrict v1, int nin, int *Nsize, int *bc)
real_t
double real_t
Definition: bridgeACC_AField_double.cpp:14
BridgeACC::shift_lex_zm1
void shift_lex_zm1(real_t *restrict buf, real_t *restrict v1, int nin, int *Nsize, int *bc)
Field::ptr
const double * ptr(const int jin, const int site, const int jex) const
Definition: field.h:153
BridgeACC::shift_lex_zmb
void shift_lex_zmb(real_t *restrict v2, real_t *restrict v1, int nin, int *Nsize, int *bc)
BridgeACC::shift_lex_ym1
void shift_lex_ym1(real_t *restrict buf, real_t *restrict v1, int nin, int *Nsize, int *bc)
CommonParameters::Vlevel
static Bridge::VerboseLevel Vlevel()
Definition: commonParameters.h:122
ShiftAField_lex::dn_y
void dn_y(real_t *, real_t *)
Definition: shiftAField_lex-tmpl.h:411
BridgeACC::shift_lex_xmb
void shift_lex_xmb(real_t *restrict v2, real_t *restrict v1, int nin, int *Nsize, int *bc)
Communicator::ipe
static int ipe(const int dir)
logical coordinate of current proc.
Definition: communicator.cpp:105
ShiftAField_lex::up_x
void up_x(real_t *, real_t *)
Definition: shiftAField_lex-tmpl.h:309
ShiftAField_lex::up_z
void up_z(real_t *, real_t *)
Definition: shiftAField_lex-tmpl.h:446
BridgeACC::shift_lex_ym2
void shift_lex_ym2(real_t *restrict v2, real_t *restrict buf, int nin, int *Nsize, int *bc)
ShiftAField_lex::forward
void forward(AFIELD &, const AFIELD &, const int mu)
Definition: shiftAField_lex-tmpl.h:241
Bridge::BridgeIO::crucial
void crucial(const char *format,...)
Definition: bridgeIO.cpp:242
Field
Container of Field-type object.
Definition: field.h:46
BridgeACC::shift_lex_tm2
void shift_lex_tm2(real_t *restrict v2, real_t *restrict buf, int nin, int *Nsize, int *bc)
ThreadManager::get_thread_id
static int get_thread_id()
returns thread id.
Definition: threadManager.cpp:253
BridgeACC::shift_lex_zm2
void shift_lex_zm2(real_t *restrict v2, real_t *restrict buf, int nin, int *Nsize, int *bc)
BridgeACC::shift_lex_xp1
void shift_lex_xp1(real_t *restrict buf, real_t *restrict v1, int nin, int *Nsize, int *bc)
BridgeACC::shift_lex_zp1
void shift_lex_zp1(real_t *restrict buf, real_t *restrict v1, int nin, int *Nsize, int *bc)
BridgeACC::shift_lex_tp2
void shift_lex_tp2(real_t *restrict v2, real_t *restrict buf, int nin, int *Nsize, int *bc)
BridgeACC::shift_lex_xp2
void shift_lex_xp2(real_t *restrict v2, real_t *restrict buf, int nin, int *Nsize, int *bc)
Bridge::BridgeIO::general
void general(const char *format,...)
Definition: bridgeIO.cpp:262
BridgeACC::copy_to_device
void copy_to_device(double *v, int nv)
Bridge::vout
BridgeIO vout
Definition: bridgeIO.cpp:572
BridgeACC::afield_init
void afield_init(double *data, const int size)